Bug 416 - Digital outputs are not immetiately locking on 44.10 on uncompressed streams
: Digital outputs are not immetiately locking on 44.10 on uncompressed streams
Status: RESOLVED WONTFIX
Product: SB 1
Classification: Unclassified
Component: Firmware
: unspecified
: PC Windows XP
: P2 normal (vote)
: ---
Assigned To: Sean Adams
:
Depends on:
Blocks:
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Reported: 2004-06-27 02:30 UTC by Michel Fombellida
Modified: 2005-03-28 09:11 UTC (History)
0 users

See Also:
Category: ---


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Description Michel Fombellida 2004-06-27 02:30:16 UTC
Hi,

I see a transient problem with the digital outputs of the SB when streaming 
uncompressed audio (both WAV or AIFF). 

First I must say that I have an Apogee Big Ben reclocking tool connected on 
the outputs of the squeezebox which allows me to see the exact frequency that 
the SB is delivering. In some circumstances I can see that it is wrong! 

The output frequency is temporarily wrong when the SB is started and the 
source is uncompressed (i.e. when it has to lock for the first time on an 
incoming WAV or AIFF signal) or when I switch from a compressed source (MP3) 
to an uncompressed source (WAV or AIFF). In both cases, the SB always 
initially outputs a signal at 43,95 khz and then it slowly drifts to finaly 
reach 44.10 khz and stabilize there. It takes more than 10 seconds to reach 
44.10. During this drift period, my DAC first start playing then stops 
(sometimes with nasty sound) and will only restart playing with the signal is 
properly locked on 44.10. From that point, it will work perfectly until I 
retriger the problem for example going to an MP3 stream and then back to WAV 
or AIFF, or if the Squeezebox has to re-initiate the communication with the 
server.

Note that when the stream is going from WAV/AIFF to MP3, or if the SB is 
started on MP3, the lock is immediate. The drift only occur on transition from 
MP3 to WAV/AIFF or if the SB is started on WAV/AIFF.

This problem is reproduceable and it is like that since many releases (with 
all V2x firmwares). 

Is this due to the design of the PLL?

Please note that I did not consider it as a blocker as it is a transient 
problem.

Michel
Comment 1 Blackketter Dean 2005-03-28 09:11:38 UTC
Alas, this isn't possible to fix with the current hardware.