Bugzilla – Bug 12623
Kernel sets MDC (FEC MDIO clock) 2x too fast
Last modified: 2009-09-08 09:18:58 UTC
The FEC MDC clock is 4.7MHz, but it should be 2.5 MHZ max.
It appears that this is controlled by the MSCR register. I think.
Fixed in r6313. Caleb needs to verify the fix.
Checked. Frequency is 2.3MHz.